AtlasBase chip packs 5.6 billion DNA synthesis sites for molecular compute
AtlasBase’s Thalia chip scales DNA synthesis to 5.6 billion sites, enabling enterprise‑grade molecular storage and in‑memory computation.

AtlasBase’s Thalia Chip: Scaling DNA Synthesis for Enterprise Molecular Computing
AtlasBase has announced the Thalia chip, a CMOS‑based DNA synthesis processor that offers 5.6 billion electro‑chemical synthesis sites—a roughly 700× increase over prior DNA‑synthesis platforms. By leveraging existing semiconductor manufacturing lines, the company aims to bring molecular storage and computation to the scale of modern data centers, positioning DNA as a complementary substrate for long‑term data preservation and specialized parallel processing.
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From Lab‑Scale to Hyperscale DNA Synthesis
Traditional DNA‑based storage systems have been hampered by low throughput and high cost, limiting their use to niche archival projects. Thalia’s massive site count directly addresses this bottleneck, allowing synthetic DNA strands to be generated at rates compatible with enterprise workloads. The chip’s design integrates electro‑chemical synthesis within a standard CMOS process, meaning that existing fabs can produce the hardware without the need for dedicated bio‑fabrication facilities. This manufacturing approach is intended to accelerate commercial viability and simplify integration with current data‑center architectures.
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Unified Storage‑Compute Architecture
AtlasBase’s platform treats synthetic DNA as both a storage medium and a computational substrate. Once a dataset is encoded into DNA, the same molecular pool can be used for in‑memory computation—for example, executing massively parallel search or optimization algorithms that exploit DNA’s inherent combinatorial capabilities. By eliminating the data movement between separate storage and processing units, the architecture promises lower latency for workloads that benefit from parallelism, such as complex graph traversals, pattern matching, and certain AI‑related inference tasks.
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Enterprise Use Cases and Target Markets
The company envisions the technology complementing, rather than replacing, silicon‑based processors. Potential early adopters include:
- Digital preservation: Industries with massive, long‑lived content libraries (media, entertainment, scientific archives) can store petabytes of data in a physically compact, durable format.
- Optimization‑heavy workloads: Sectors such as logistics, finance, and drug discovery that require solving large combinatorial problems may benefit from DNA‑based parallelism.
- Hybrid AI pipelines: Organizations that need to retain training data for decades while performing occasional, compute‑intensive queries could offload those queries to the molecular layer.
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Roadmap and Commercial Outlook
AtlasBase, founded in 2025 and headquartered in San Francisco, plans to roll out pilot deployments in hyperscale data centers within the next 12‑18 months. By using mass‑production‑ready CMOS processes, the company expects to achieve cost per base‑pair comparable to, or better than, current synthetic DNA services once volume scaling is realized. The roadmap includes:
- Beta integration with existing storage arrays to demonstrate seamless data movement between silicon and DNA layers.
- Software toolkits that translate high‑level optimization problems into DNA‑compatible operations.
- Scalable manufacturing ramps that increase site counts beyond the initial 5.6 billion, further reducing per‑byte cost.
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Practical Takeaway
AtlasBase’s Thalia chip marks a significant engineering milestone: it bridges the gap between laboratory‑scale DNA synthesis and the throughput required for enterprise data‑center environments. By embedding DNA synthesis in a familiar CMOS workflow, the company reduces the barrier to adoption and opens a pathway for hybrid storage‑compute systems that could reshape how organizations handle ultra‑large, long‑term datasets and parallelizable workloads. While the technology is still emerging, its promise lies in delivering dense, durable storage alongside parallel processing capabilities that silicon alone cannot match.
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