Chalmers University Demonstrates TRIO Pulses for Control-Error-Robust Single-Qubit Gates in Superconducting Processors

Robust Single‑Qubit Gates with TRIO Pulses

A team at Chalmers University of Technology, working with partners at Université Bourgogne Europe and Aalto University, has introduced a new quantum‑control method called Time‑Rescaling Robust Inverse‑Optimal (TRIO) pulses. The approach is designed to make single‑qubit gates on superconducting transmon processors tolerant to two of the most common control errors: mis‑calibrated drive amplitudes and frequency detuning. Experimental results on a 90‑ns X‑gate demonstrate that the TRIO envelope maintains high fidelity across a much wider error window than standard DRAG‑Gaussian pulses, suggesting a practical route to reduce the frequent recalibration required in large‑scale quantum processors.

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How TRIO Pulses Work

Traditional inverse‑optimal (RIO) pulse designs engineer a trajectory on the Bloch sphere that minimizes the required energy, but the resulting waveforms often contain sharp edges. Those edges are difficult for the finite‑bandwidth microwave hardware used to drive transmons, leading to spectral leakage and unwanted excitation of higher energy levels.

TRIO addresses this by applying a time‑rescaling function \(g(\tau)\) that stretches the optimal trajectory into a smooth, hyper‑Gaussian envelope \(\Omega_{\text{TR}}(\tau)\). The geometry of the original optimal path is preserved, while high‑frequency components that cause hardware distortion are suppressed. The smooth envelope is then combined with the first‑order Derivative Removal by Adiabatic Gate (DRAG) correction, which compensates for AC‑Stark shifts and leakage to the transmon’s second excited state. The final control signal is generated through IQ modulation, allowing simultaneous adjustment of the Rabi frequency and detuning throughout the pulse.

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Experimental Performance

The researchers tested TRIO pulses on a standard superconducting transmon chip. Key results include:

• X‑gate (π rotation, 90 ns): Interleaved Randomized Benchmarking (IRB) fidelity of 99.90 % under nominal conditions.
• Robustness: Fidelity remains above 99.5 % when the drive amplitude is varied by ±20 % and the qubit frequency is detuned by up to 4 MHz.
• Comparison to DRAG Gaussian: A calibrated DRAG Gaussian X‑gate achieves a peak fidelity of 99.94 % but drops to roughly 92 % under the same combined amplitude and detuning errors, indicating an order‑of‑magnitude narrower tolerance window.
• Universal gate set: TRIO‑engineered X‑π/2, Y‑‑π/2, and Hadamard‑type gates show average fidelities between 99.60 % and 99.69 %, confirming that the method extends beyond simple π‑rotations.

These measurements were obtained using standard interleaved randomized benchmarking and parameter sweeps across the amplitude‑detuning space. The reported pulse areas (e.g., \(E_{X}^{\text{opt}} = 3.461\pi\)) illustrate that TRIO pulses use slightly higher energy than the minimal Gaussian case, a trade‑off that yields smoother waveforms and greater error tolerance.

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Implications for Scalable Quantum Computing

Control‑error robustness is a critical factor for the viability of large‑scale quantum processors. Frequent recalibration of drive amplitudes and qubit frequencies can dominate the overhead in a multi‑qubit system, especially as the number of control lines grows. By expanding the region of parameter space where high‑fidelity gates are achievable, TRIO pulses could:

1. Reduce calibration cycles – Operators can tolerate larger drifts before re‑tuning, freeing up experimental time.
2. Simplify hardware requirements – Smoother pulse spectra place less demand on the bandwidth and linearity of microwave generators and amplifiers.
3. Facilitate heterogeneous architectures – Simulations suggest that applying TRIO to qubits with higher anharmonicity (e.g., fluxonium) could push gate errors below the 10⁻⁶ level, opening the door to mixed‑technology processors.

The integration of TRIO with existing DRAG techniques also means that current control stacks can adopt the method with modest software updates, without requiring new hardware.

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Looking Ahead

The TRIO framework represents a concrete step toward control‑error‑robust quantum gates. Future work will likely explore:

• Extending the approach to two‑qubit entangling operations, where cross‑talk and frequency crowding introduce additional error channels.
• Automating the time‑rescaling optimization to generate robust pulses on‑the‑fly for dynamically changing hardware conditions.
• Benchmarking TRIO pulses on larger processor arrays to quantify the impact on overall algorithmic performance and error‑correction thresholds.

For teams building superconducting quantum processors, TRIO pulses offer a practical, experimentally validated tool to tighten gate performance while loosening the tight calibration loops that currently limit scalability.